Etching metal silicides and germanides

ABSTRACT

A metal silicide may be selectively etched by converting the metal silicide to a metal silicate. This may be done using oxidation. The metal silicate may then be removed, for example, by wet etching. A non-destructive low pH wet etchant may be utilized, in some embodiments, with high selectivity by dissolution.

This application is a divisional of U.S. patent application Ser. No.10/622,955, filed on Jul. 18, 2003.

BACKGROUND

This invention relates generally to etching metal silicides andgermanides in connection with semiconductor processing.

Metal silicides and germanides are conventionally somewhat difficult toetch. A robust chemistry is needed to remove the silicides orgermanides. Selectively etching the silicide, while not adverselyaffecting surrounding components, is a problem.

One example of a situation where it is desired to etch silicide is inconnection with metal gate replacement processes. In such processes, asilicon gate or, more particularly, a polysilicon gate may be removed ina selected number of instances and replaced with a metal gate.

Commonly, the polysilicon material is in contact with a metal and formsa silicide. Conventional etching may not selectively remove the silicidefrom the polysilicon without adversely affecting other components.

One approach to the problem is to form the metal layer over both thelocations where the gate is to be removed and the locations where thegate is to remain. A hard mask may be retained over the gates that willultimately be removed in order to prevent the formation of a silicide.However, patterning of the high dielectric constant gate oxide may bedifficult without removing the hard mask. Thus, the use of a hard maskto protect the polysilicon from the silicide formation is an incompletesolution to the problem.

Thus, there is a need for better ways to facilitate the selectiveetching of silicides and germanides.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an enlarged, cross-sectional view of one embodiment of thepresent invention at an early stage of manufacture;

FIG. 2 is an enlarged, cross-sectional view corresponding to FIG. 1after further processing; and

FIG. 3 is an enlarged, cross-sectional view of the embodiment in FIG. 2after further processing.

DETAILED DESCRIPTION

In general, a metal silicide or germanide may be selectively etched byconverting the metal silicide or germanide into a metal silicate orgerminate. This may be done by oxidizing the metal-silicon/germaniumbond to form the silicate or germinate. The metal-to-silicide bond isrelatively weak compared to silicon-to-oxygen or metal-to-oxygen bonds.Hence, oxidation of the metal-to-silicon bond is energetically favored,given the correct oxidation conditions. The correct oxidation conditionsmay include, in some embodiments, the use of an aqueous solution ofhydrogen peroxide, organic peroxides, gaseous oxygen, or ozone, tomention a few examples. Such treatments oxidize neutral metals and baresilicon to their respective oxides. Also, in some embodiments, extremeoxidation conditions may yield products including silicon dioxide andnon-discernable metal species. The intermediate silicon species can beisolated and exploited.

Thus, in some embodiments of the present invention, the silicide orgermanide is first converted to a silicate or germinate and then thesilicate or germinate is selectively etched away. In other embodiments,the removal and the conversion to silicate or germinate may occursimultaneously in a one-step process.

Referring to FIG. 1, in an embodiment involving a metal gate replacementprocess, a semiconductor wafer 10 may include a substrate 12 having asource/drain region 24 formed on either side of the polysilicon gateelectrode 20. The substrate 12 may include silicon or germanium. Adielectric 22 may separate the electrode 20 from the substrate 12.Sidewall spacers 18 may coat the side of the gate electrode 20. Agermanide or silicide 16 may be formed over the gate electrode 20. Forexample, cobalt or nickel silicides may be formed. An interlayerdielectric 14 may be positioned over the substrate 12, around the gateelectrode 20 and the silicide 16.

The structure shown in FIG. 1 may be exposed to a mild oxidant, such ashydrogen peroxide or R₂O₂ (where R is an organic material), O₃ in vaporor gas form, or O₂ in gaseous form. The oxidation converts the germanideor silicide 16 into the germinate or silicate 16 a as indicated in FIG.2. Next, the germinate or silicate 16 a may be selectively etched usinga non-destructive, low pH wet etchant, such as H₃PO₄, sulfuric acid,chelating species, or supercritical carbon dioxide at lower temperaturessuch as 25 to 120° C. In one embodiment, the wafers may be immersed in abath of liquid etchant. These etchants have high selectivity and work bydissolution. This results in the selective removal of the silicide 16 a.

In some embodiments, the oxidation and the wet etching processes may becombined, enabling the silicide to be removed in essentially one stepwith two parallel processes occurring at the same time.

It is desirable, in some embodiments, to use mild oxidation to reducethe formation of silicon dioxide. Selectively removing silicon dioxideis more difficult because of the likelihood that other occurrences ofsilicon dioxide on the wafer will be unintentionally removed.

In some embodiments, after exposing the gate electrode 20, the gateelectrode 20 may be removed using conventional technology and the gateelectrode may be replaced with a metal gate electrode. However, thepresent invention is not necessarily limited to silicide removal inconnection with metal gate replacement processes.

In some embodiments, vaporous or gaseous oxidizers may be used. Butgiven the cage-like structure of silicate oligomers, the use of liquidoxidants may be advantageous.

While the present invention has been described with respect to a limitednumber of embodiments, those skilled in the art will appreciate numerousmodifications and variations therefrom. It is intended that the appendedclaims cover all such modifications and variations as fall within thetrue spirit and scope of this present invention.

1. a semiconductor structure comprising: a substrate; a polysiliconlayer over said substrate; and a metal silicate formed on saidpolysilicon layer.
 2. The structure of claim 1 wherein said polysiliconis a polysilicon gate electrode.
 3. The structure of claim 2 including asidewall spacer on said polysilicon gate electrode.
 4. The structure ofclaim 3 including a source and drain formed adjacent said gateelectrode.
 5. The structure of claim 4 including a gate oxide under saidgate electrode.
 6. A semiconductor structure comprising: a substrate; alayer over said substrate; and a metal germinate formed on said layer.7. The structure of claim 6 wherein said layer is a gate electrode. 8.The structure of claim 7 including a sidewall spacer on said gateelectrode.
 9. The structure of claim 8 including a source and drainformed adjacent said gate electrode.
 10. The structure of claim 9including a gate oxide under said gate electrode.